High Speed Multiplier Design Using Kogge Stone Adder
R. Arun Sekar1, D. Ganeshkumar2, A. Rajendran3, S. Sasipriya4

1R. Arun Sekar, Department of ECE, GMR Instiute of Technology, Rajam (Andhra Pradesh), India.
2D. Ganeshkumar, Department of ECE, P.A College of Engineering and Technology, Pollachi (Tamil Nadu), India.
3A. Rajendran, Department of ECE, Karpagam College of Engineering, Coimbatore (Tamil Nadu), India.
4S. Sasipriya, Department of ECE, Sri Krishna College of Engineering & Technology, Coimbatore (Tamil Nadu), India.
Manuscript received on 05 May 2019 | Revised Manuscript received on 17 May 2019 | Manuscript Published on 23 May 2019 | PP: 571-579 | Volume-7 Issue-6S5 April 2019 | Retrieval Number: F11010476S519/2019©BEIESP
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Abstract: The multipliers are the heart of any high-speed computational devices. The multipliers are fully made up of combinational circuits. They have a large circuit design with high gate density, in fact high transistor density. This large active area provides space to have large power dissipation. Obviously, this provides a concern to reduce power dissipation in the multipliers. In this work a high-speed multiplier is designed based on the fast-parallel prefix adder as Kogge stone adder. Different adders are compared with respect to the speed of operation and Kogge stone is the best among the different adders. As Vedic multiplier is considered as the fast multiplier, the adder part in this Vedic multiplier is replaced by Kogge stone adder to form the hybrid high speed Vedic multiplier. This Proposed hybrid Vedic multiplier proved to be efficient in terms of power, delay and Power delay product.
Keywords: Carry Skip Adder (CSKA), Carry Look ahead Adder (CLA), Carry Save Adder (CSA), Carry Select Adder (CSLA), Kogge Stone Adder (KSA), Vedic Multiplier (VM).
Scope of the Article: Microstrip Antenna Design and Application