Design and Implementation of Pipelined AES Encryption System using FPGA
Mohamed Nabil1, Ashraf A. M. Khalaf2, Sara M. Hassan3
1Mohamed Nabil*, Department of Electronics and Communications, Faculty of Engineering, Minia University, Minia, Egypt.
2Ashraf A. M. Khalaf, Department of Electronics and Communications, Faculty of Engineering, Minia University, Minia, Egypt.
3Sara M. Hassan, Department of Electronics and Communications, Faculty of Engineering, Modern Academy, Cairo, Egypt. 

Manuscript received on January 02, 2020. | Revised Manuscript received on January 15, 2020. | Manuscript published on January 30, 2020. | PP: 2565-2571 | Volume-8 Issue-5, January 2020. | Retrieval Number: E6475018520/2020©BEIESP | DOI: 10.35940/ijrte.E6475.018520

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Abstract: Nowadays, the data encryption became very important because of the usage of the data transmission in all the filed. The Advanced Encryption Standard (AES) that known as Rijndael algorithm is one of the most common encryption algorithms. The AES consists of 9 rounds in addition to the initial and final rounds that makes the AES consumes much time for encrypting the data. Of course the time consumption is considered one of the problems that face the information security. The more time the encryption system consumes to encrypt the data, the more chances increase for the hackers to break into the system. In this work, we find a new technique that can be used to increase the performance speed of the advanced encryption standard. The proposed algorithm methodology depends on the pipelined processing method for the processing time reduction. The paper includes a discussion of the design, the analysis and the implementation using Field Programmable Gate Array (FPGA) of the pipelined method to reduce the consumed numbers of clocks and speed up the processes. The AES is used to protect information and encrypt sensitive data and used in satellites, missiles, military application and other critical application. The paper describes the AES encryption system algorithm and the implementation of both the normal processing and the pipelined processing, and finally a comparison between the two algorithms.
Keywords: Encryption; Rijndael; Key; AES; Algorithm and Pipelined.
Scope of the Article: FPGAs.