Performance Analysis of Low Noise Amplifier using Junction Less GAA TFET and Conventional MOSFET
T. Jasparvinithasundari

T. Jasparvinithasundari, Department of Electronics and Communication Engineering, Kumaraguru College of Technology, Coimbatore (Tamil Nadu), India.
Manuscript received on 16 December 2018 | Revised Manuscript received on 27 December 2018 | Manuscript Published on 09 January 2019 | PP: 449-452 | Volume-7 Issue-4S November 2018 | Retrieval Number: E2041017519/19©BEIESP
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Abstract: The risingdemands to overcome the disadvantage of conventional MOSFET such as physical limitations due to its short channel effects has stimulated the development of a number of better device geometries and materials. Few of such novel devices are FinField Effect Transistor, Nanowire and FETs based on Carbon Nanotube, having characteristics like quasi two- as well as one-dimensional channel geometries for better electrostatics. While a lot of these efforts aims only on building up high-performance devices, the making of a roadmap to forecast analog circuit performance added with the large scale integration for these technologies is essential. In this paper we have incorporated Junctionless gate all around TFET for analog circuit design, thus leading to ease of fabrication because of absence of doping concentration gradients for specific regions. In addition low power consumption is obtained by TFETs as they are less prone to second order effects. The common source low noise amplifier circuit has been designed using the device as well as MOSFET and their performances are analyzed using various parameters like gain and noise figure.
Keywords: Junctionless Gate all around TFET, MOSFET, Low Noise Amplifier, Gain, Noise Figure.
Scope of the Article: Low-power design