Advance NOC Router with LOW Latancy & Low Power Consumption by Wormhole Switching
Rajesh Nema1, Teena Raikwar2, Prerna Suryavanshi3
1Rajesh Nema, Department of E&C, NRI Institute of Science of Technology, Bhopal (Madhya Pradesh ), India.
2Teena Raikwar, Department of E&C, NRI Institute of Science of Technology, Bhopal (Madhya Pradesh ), India.
3Prerna Suryavanshi, Department of E&C, NRI Institute of Science of Technology, Bhopal (Madhya Pradesh ), India.
Manuscript received on 21 January 2013 | Revised Manuscript received on 28 January 2013 | Manuscript published on 30 January 2013 | PP: 5-7 | Volume-1 Issue-6, January 2013 | Retrieval Number: E0375011613/2013©BEIESP
Open Access | Ethics and Policies | Cite | Mendeley | Indexing and Abstracting
© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Network on Chip (NoC) is an approach to designing communication subsystem between intelligent property (IP) cores in a system on chip (SoC). Packet switched networks are being proposed as a global communication architecture for future system-on-chip (SoC) designs. In this project, we propose a design with low latency and low power consumption and implement a wormhole router supporting multicast for Networkon-chip. Wormhole routing is a network flow control mechanism which decomposes a packet into smaller flits and delivers the flits in a pipelined fashion. It has good performance and small buffering requirements. We proposed different power consumption with different frequency with different temperature.
Keywords: (NoC), (SoC), (IP).
Scope of the Article: Routing, Switching and Addressing Techniques