Next Generation Logic Gate Designs using Improved Polarity Control Bipolar Junction Transistor
Lokesh Kumar Bramhane1, Santosh D. Chede2, Premanand K. Kadbe3, Balasaheb Patil4, Sudhir B. Lande5
1Lokesh Kumar Bramhane*, department of E&TC, VPKBIET Baramati, Pune, India.
2Santosh D. Chede, Department of E&TC, VPKBIET Baramati, Pune, India.
3Premanand K. Kadbe, Department of E&TC, VPKBIET Baramati, Pune, India.
4Balasaheb Patil, department of E&TC, VPKBIET Baramati, Pune, India.
5S. B. Lande, department of E&TC, VPKBIET Baramati, Pune, India.
Manuscript received on November 15, 2019. | Revised Manuscript received on November 23, 2019. | Manuscript published on November 30, 2019. | PP: 2015-2019 | Volume-8 Issue-4, November 2019. | Retrieval Number: D6887118419/2019©BEIESP | DOI: 10.35940/ijrte.D6887.118419
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: In this paper, we have proposed a dopingless reconfigurable polarity control bipolar junction transistor (PC-BJT) with enhanced current gain and currentoff frequency. It can be used as both n-i-n or p-i-p type transistors by applying an appropriate voltage (±1 V) on its polarity control electrodes. It is very first time that BJTs are used to implemented in XOR logic gate design with the concepts of reconfigurability and polarity control electrodes. For this, a new symbol is introduced to demonstrate the behavior of logic gates. Moreover, series and parallel combination of the proposed device exhibits the behavior of two-input NAND-NOR (PC=+1 V) and AND-OR (PC=-1 V) gates. Moreover, the proposed device exhibits the low on-time voltage and improved breakdown voltage compared to the conventional PC-BJT.
Keywords: On-Time Voltage, Reconfigurability, Polarity Control • Logic Gates, Current Gain, Cut-Off, Frequency, TCAD Simulator.
Scope of the Article: Next Generation Internet & Web Architectures.