Magnitude Comparator Realization using Threshold Logic
Soumya R1, V. Sureh Babu2, Varun P. Gopi3
1Soumya.R, V. Sureh Babu*, Dept. of Electronics and Communication Engineering College of Engineering Trivandrum.
2Varun P. Gopi, Dept. of Electronics and Communication Engineering National Institute of Technology Tiruchirappalli, India.
Manuscript received on 5 August 2019. | Revised Manuscript received on 11 August 2019. | Manuscript published on 30 September 2019. | PP: 1917-1921 | Volume-8 Issue-3 September 2019 | Retrieval Number: C4469098319/19©BEIESP | DOI: 10.35940/ijrte.C4469.098319
Open Access | Ethics and Policies | Cite | Mendeley | Indexing and Abstracting
© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Threshold logic design can be regarded as an alternative method of traditional logic gate design. Threshold logic can be considered as the primary logic of brain. Neurons can be considered as threshold logic gates. Each neuron fires when its activation threshold is crossed. The basic idea behind threshold logic is threshold decision principle. Threshold decision principle checks whether the weighted sum of inputs crosses a threshold and accordingly output is defined. Several implementations for threshold logic were proposed. Resistive threshold logic is a new method for threshold logic implementation. In this paper, using the concept of resistive threshold logic, a magnitude comparator is realized. LTSpiceIV and Electric VLSI Design System are the simulation tools used in this work.
Keywords: Comparator, Digital Circuits, Memristors, Rhreshold Logic.
Scope of the Article: Digital System and Logic Design.