Single Stage 180nm CMOS Low Noise Amplifier Topologies and Optimization Algorithms for S Band Frequency
1Jahnavi.D*, Information and Communication Engineering, Anna University, Chennai, India.
2Kavya.G, Electronics and Communication Engineering, S.A.Engineering College, Anna University Chennai, India.
Manuscript received on 15 August 2019. | Revised Manuscript received on 25 August 2019. | Manuscript published on 30 September 2019. | PP: 152-157 | Volume-8 Issue-3 September 2019 | Retrieval Number: C3913098319/19©BEIESP | DOI: 10.35940/ijrte.C3913.098319
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Abstract: Low Noise Amplifier (LNA) plays an important role in radio receivers. It mainly determines the system noise and intermodulation behavior of overall receiver. LNA design is more challenging as it requires high gain, low noise figure, good input and output matching and unconditional stability. Further, designing a Low noise Amplifier requires active device selection, amplifier topology, optimization algorithms for superlative results. Hence this paper presents performance analysis of CMOS LNA based on different topologies and optimization algorithms for 180nm RF CMOS design in S band frequency. Here the best results, various limitations in each topology are reviewed and required specifications are determined in each designing. Further this best topology is used for designing LNA circuit which could be used in Indian Regional Navigation Satellite System (IRNSS) applications in dual band frequency.
Keywords: Low Noise Amplifier (LNA), CMOS, Radio frequency (RF), Noise Figure, Gain, Stability ,IRNSS..
Scope of the Article: Data Analytics Modelling and Algorithms