An Analytical Modeling for Dual Source Vertical Tunnel Field Effect Transistor
Soniya1, Balwinder Raj2, Shailendra Singh3, Girish Wadhwa4

1Soniya, Nano electronics Research Lab, Department of Electronics and Communication Engineering, NIT Jalandhar, India
2Balwinder Raj, Nano electronics Research Lab, Department of Electronics and Communication Engineering, NIT Jalandhar, India
3Shailendra Singh, Nano electronics Research Lab, Department of Electronics and Communication Engineering, NIT Jalandhar, India
4Girish Wadhwa, Nano electronics Research Lab, Department of Electronics and Communication Engineering, NIT Jalandhar, India

Manuscript received on 12 August 2019. | Revised Manuscript received on 22 August 2019. | Manuscript published on 30 September 2019. | PP: 603-608 | Volume-8 Issue-3 September 2019 | Retrieval Number: B2253078219/19©BEIESP | DOI: 10.35940/ijrte.B2253.098319
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: The given paper proposes the 2D analytical modeling of surface potential and electric field for a Dual Source Vertical Tunnel Field Effect Transistor (DSV-TFET). The 2-D Poisson equations are solved by parabolic approximation method, with the help of suitable boundary conditions and analytical expressions for surface potential and electric field distribution in DSV-TFET. The analytical results of proposed model are compared with simulation results drive using SILVACO TCAD tool, whereas in our proposed device DSV-TFET provides the high on current (ION=1.74×10-4 A/μm), low OFF current (IOFF= 6.92 ×10-13 A/μm), ION/IOFF current ratio in order of 108 to 109 with the minimum point of average subthreshold slope of 3.47 mV/decade which can be used for low power application.
Index Terms: Dual Source Vertical Tunnel FET (DSV-TFET), Subthreshold Slope (SS), Band-to-Band Tunneling (BTBT), Work Function (WF), Average Subthreshold Slope (AVSS), Low Power (LP).

Scope of the Article: Low Power Design