High Speed EX-OR Gate at 22nm High K Metal Gate Strained SI Technology Node
Shobha Sharma1, Amita Dev2
1Shobha Sharma, Indira Gandhi Delhi Technical University for Women, Kashmiri Gate, New Delhi, India.
2Amita Dev, Indira Gandhi Delhi Technical University for Women, Kashmiri Gate, New Delhi, India.
Manuscript received on 23 May 2015 | Revised Manuscript received on 30 May 2015 | Manuscript published on 30 May 2015 | PP: 41-42 | Volume-4 Issue-2, May 2015 | Retrieval Number: B1417054215©BEIESP
Open Access | Ethics and Policies | Cite | Mendeley | Indexing and Abstracting
© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Four transistor exor gate is chosen and made to work with reverse body bias in all the four transistor. In an another setup, the same exor gate is made to work with forward body bias of 0.45V in all the transistors of the ex_OR gate. The propagation delay is observed to be reduced by 25.146% in the case of all transistors forward body bias. The propagation delay in the normal reverse body bias is 26.096X10-12 sec whereas in the all transistor forward body bias, it is 19.534X10-12 Sec. This high speed Ex-OR gate finds it’s application where power penalty is acceptable.
Keyword: Exor gate, Ex_OR, Ex-OR, Transistor,
Scope of the Article: High Speed Networks