The Comparative Study of FPGA based FIR Filter Design using Optimized Convolution Method and Overlap Save Method
Gargi Roy1, Madhumita Mukherjee2

1Gargi Roy, B.Tech, IERCEM Institute Of Information Technology (West Bengal University of technology), M.Tech, Heritage Institute of Technology West Bengal, India.
2Madhumita Mukherjee, B.Tech West Bengal University of Technology M.Tech Jadavpur University Respectively. Assistant Professor Department of Electronics, Telecommunication, Heritage Institute of Technology under West Bengal, India.

Manuscript received on 20 March 2014 | Revised Manuscript received on 25 March 2014 | Manuscript published on 30 March 2014 | PP: 37-44 | Volume-3 Issue-1, March 2014 | Retrieval Number: A0985033114/2014©BEIESP
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Abstract: This paper describes a comparative study of designing digital filter of long duration sequences. Here we have adopted the approach of block filtering scheme “overlap save method” and compare with the optimized linear convolution scheme for designing digital filter. We have implemented both methods in FPGA Spartan 3A starter kit, XC3S700A device. Implementing both algorithms in FPGA hardware platform reveals that there is a 67% area reduction and 70.6% increase in operating frequency in overlap save method compare to optimize convolution method. In addition the power utilization summary reveals that there is a 24.24% increased in the power utilization of overlap save method. Thus the experimental results shows that to design an area optimized , high speed digital filter we should used overlap save method where as for a power efficient digital filter we should used optimized linear convolution method.
Keywords: FIR,MATLAB, Linear Convolution.

Scope of the Article: Low-power design