An Integrated Perspective of Crucial Research Issues in NoC Router Design
Trupti Patil1, Anuradha S2
1Trupti Patil , M.Tech in Embedded system from JNTU, Hyderabad
2Dr Anuradha M Sandi, Associate Professor, GNDEC, Bidar,.
Manuscript received on April 02, 2020. | Revised Manuscript received on April 15, 2020. | Manuscript published on May 30, 2020. | PP: 480-484 | Volume-9 Issue-1, May 2020. | Retrieval Number: F8453038620/2020©BEIESP | DOI: 10.35940/ijrte.F8453.059120
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: A new reliable high throughput NOC router design is proposed with FSM based smart arbiter module for 4X4 Mesh architecture. This design is based the XY routing algorithm with prioritized round robin arbitration and synthesis of the proposed design is done on Spartan III FPGA. An enhanced work is also done in this paper to explore the drawbacks of the exceptional techniques of the existing generation and to research the scope for overall performance improvisation of the NoC designing.
Keywords: Arbiter, FPGA, Network on Chip (NOC), XY Routing, Prioritized Round Robin Arbitration.
Scope of the Article: Networked-Driven Multicourse Chips