Simulation of Coherent PSK Circuit for Wireless Data Communication with Zero Bit Error Rate
1Ms.P.Nallathai, Department of ECE, B.S. Abdur Rahman University, Chennai (Tamil Nadu), India.
2Dr. N. Nithiyanandam, Department of ECE, B.S. Abdur Rahman University, Chennai (Tamil Nadu), India.
Manuscript received on 21 January 2013 | Revised Manuscript received on 28 January 2013 | Manuscript published on 30 January 2013 | PP: 66-68 | Volume-1 Issue-6, January 2013 | Retrieval Number: F0418021613/2013©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: A Coherent phase-shift-keyed (CPSK) wireless data communication circuit, based on differential signaling, is simulated for error-free data recovery. The simulated circuit is tested and the results are reported, indicating error-free data recovery. In these simulation tests, data with bit rates varying from 1Kb/s to 1Mb/s are transmitted through simulated AWGN channels with channel noise variance ranging from 1 to 10,000. All the test results indicate error-free data recovery.
Keywords: Coherent PSK, Differential Signaling, Wireless Communication, Zero BER Data Recovery.
Scope of the Article: Wireless Communications