FPGA Implementation of Smart Cryptography Algorithm
B. Prathiba1, E. Lakshmi Prasad2, N. B. Hulle3, Sarika R. Khope4
1Prathiba B*, Department of E&TC, G. H. Raisoni Institute of Engineering & Technology, Pune, India.
2E. Lakshmi Prasad, Sr. DFT Engineer, Xilinx India Pvt. Ltd., India.
3N. B. Hulle, Department of E&TC, G. H. Raisoni Institute of Engineering & Technology, Pune, India.
4Sarika R Khope, E&TC, G.H.Raisoni Institute of Engineering & Technology, Pune, India. 

Manuscript received on January 01, 2020. | Revised Manuscript received on January 20, 2020. | Manuscript published on January 30, 2020. | PP: 3017-3020 | Volume-8 Issue-5, January 2020. | Retrieval Number: E6126018520/2020©BEIESP | DOI: 10.35940/ijrte.E6126.018520

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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: Mceliece algorithm is one of the simplest algorithm which is widely used in cryptography application for encrypting and decrypting the data. In the proposed work, mceliece algorithm able to allow an infinite number of characters, but for every nine characters, it considered as one iteration due to the fixed length of matrix size (3*3). Findings: This mceliece application running over micro blaze processor, and this processor implemented on Spartan-3E FPGA. The entire experimental setup is implemented using Xilinx platform studio 14.3 and targeted on Spartan 3E-1600E FPGA.
Keywords: Mcecliece Cryptosystem, Micro Blaze Processor, Encryption, Decryption.
Scope of the Article: Encryption methods and tools.