FPGA Implementation of Auto Switching in a Multicore Hybrid Processor
M.S. Harisha1, D. Jayadevappa2

1M.S. Harisha, Research Scholar, Department of Electronics Engineering, Jain University, Bengaluru (Karnataka), India.
2D. Jayadevappa, Professor, Department of E&IE, JSS Academy of Technical Education, Bengaluru (Karnataka), India.
Manuscript received on 26 April 2019 | Revised Manuscript received on 03 May 2019 | Manuscript Published on 08 May 2019 | PP: 639-646 | Volume-7 Issue-5S3 February 2019 | Retrieval Number: E12130275S19/19©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: This paper proposes indigenously designed SMART processor core auto switching with two splitting strategies. First one is, Separating heterogeneous instructions based on functionality like hardware and software. Second one is, Checking out for FREE/BUSY status of individual core in a multi-core processor and allocate instructions or tasks to FREE status cores, thereby efficiently manage traffic and perform load balancing amongst various processor cores. I have also enclosed snapshots popular hardware interfacing & corresponding display results.
Keywords: FPGA Processor Switching Software Heterogeneous.
Scope of the Article: FPGAs