VLSI Architecture of Cubic SP line Interpolation on FPGA
C. Jayakumar1, J. Sangeetha2
1C. Jayakumar, Research Scholar, School Of Computing, Sastra University, Thanjavur (Tamil Nadu) India.
2J. Sangeetha, Assistant Professor, School Of Computing, Sastra University, Thanjavur (Tamil Nadu) India.
Manuscript received on November 10, 2019. | Revised Manuscript received on November 17, 2019. | Manuscript published on 30 November, 2019. | PP: 4014-4017 | Volume-8 Issue-4, November 2019. | Retrieval Number: D8351118419/2019©BEIESP | DOI: 10.35940/ijrte.D8351.118419
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: A novel time frequency analysis method was proposed by N.E.Huang known as Hilbert Huang Transform which, can be used for analyzing and processing real world signals. The Intrinsic Mode Functions (IMF) is the key part of this algorithm, in this part the empirically decomposed signal data points uses the cubic spline interpolation for connecting maximum and minimum points to connect lower and upper envelope of the processed signal. This paper presents the real time architecture for hardware implementation of natural cubic spline interpolation. The architecture of proposed cubic spline is using the properties of continuous cubic and linear polynomials. The experimental results showed that our proposed architecture gets better result than previous proposal implemented on Spartan 6 based FPGA board.
Keywords: Hilbert Huang Transform (HHT), Intrinsic Mode Function (IMF), cubic spline, Field Programmable Gate Array (FPGA).
Scope of the Article: FPGAs.