A Fault Tolerant Han-Carlsonadder using Tmr Technique
S. Rooban1, P. Divya2, P. Preethi3, M. Divya4
1Dr. S. Rooban, Associate Professor, Department of Electronics And Communication, KLEF, Guntur, India.
2P. Divya , Department of Electronics And Communication, KLEF, Guntur, India.
3P.Sai Preethi, , Department of Electronics And Communication, KLEF, Guntur, India.
4M.Divya, Department of Electronics And Communication, KLEF, Guntur, India.

Manuscript received on November 11, 2019. | Revised Manuscript received on November 23, 2019. | Manuscript published on 30 November, 2019. | PP: 4342-4345 | Volume-8 Issue-4, November 2019. | Retrieval Number: D8227118419/2019©BEIESP | DOI: 10.35940/ijrte.D8227.118419

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Abstract: A fault tolerant Han-Carlson adder is implemented using TMR technique. This paper suggests a technique of Triple Mode Redundancy (TMR) in which the vote is processedto produce a single output by a majority voting system. Synthesis and simulation are performed using Vivado(Xilinx). The circuitry is basically repeated in triplicate, as the name suggests, with a voting circuit used to transmit to the output the majority rule signals.
Keywords: Majority-Voter, TMR.
Scope of the Article: Computational Techniques in Civil Engineering.