A Systematic Method for Hardware Software Codesign using Vivado HLS
1K.Pranitha, Research Scholar at Anna University, Chennai, India.
2G.Kavya, Professor in Electronics and Communication Engineering at S.A. Engineering College, Chennai.
Manuscript received on November 15, 2019. | Revised Manuscript received on November 23, 2019. | Manuscript published on November 30, 2019. | PP: 467-472 | Volume-8 Issue-4, November 2019. | Retrieval Number: D7008118419/2019©BEIESP | DOI: 10.35940/ijrte.D7008.118419
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: This paper aims to provide increased productivity for designing, integrating and implementing systems using xilinx vivado design suite. It can accelerate design implementation with place and route tools that analytically optimize for multiple and concurrent design metrics such as timing, congestion, total wire length, utilization and power; it also provides design analysis capabilities at each design stage. An overview of vivado design suite is illustrated with configuration, implementation, detailed implementation, summary, settings along with component name. Here the component DDS compiler has been chosen and the waveform repository, design settings are added to it. Improved productivity results are indicated through simulation, synthesis, implementation, bitstream generation.
Keywords: Vivado IDE, DDS, Implementation.
Scope of the Article: Systems and Software Engineering.