A 2048-point Split-Radix Fast Fourier Transform Computed using Radix-4 Butterfly Units
Sonali D. Patil1, Manish Sharma2
1Sonali D. Patil*, Studying at Dr. D. Y. Patil College of Engineering, Akurdi, Pune, India.
2Manish Sharma, currently working as Associate Professor at D. Y. Patil College of Engineering, Akurdi, Pune.

Manuscript received on November 15, 2019. | Revised Manuscript received on November 23, 2019. | Manuscript published on November 30, 2019. | PP: 2043-2046 | Volume-8 Issue-4, November 2019. | Retrieval Number: B2690078219/2019©BEIESP | DOI: 10.35940/ijrte.B2690.118419

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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: For the low-power consumption of fast fourier transform, Split-radix fast Fourier transforms are widely used. SRFFT uses less number of mathematical calculations amongst the different FFT algorithms. Split-radix FFT has the same signal flow graph that of conventional radix-2/4 FFT’s. Therefore, the address generation method is same for SRFFT as of radix-2. A low power SRFFT architecture with modified butterfly units is presented over here. Here, it is shown that the, a 2048-point SRFFT is computed using radix-4 butterfly unist. Dynamic power is saved, on compromising the use of extra hardware. Here, the architecture size is increased from radix-2 to 4 and the dynamic power consumption is evaluated.
Keywords: Butterfly Unit, Low-power, Split-radix FFT, Shared-Memory.
Scope of the Article: Low-power Design.