An Improved Pso Algorithm for Floor Planning in Asic Design
R. Dheebiga1, R. Manikandan2

1R. Dheebiga, School of Computing, SASTRA Deemed University, India.
2R. Manikandan, School of Computing, SASTRA Deemed University, India.

Manuscript received on 23 March 2019 | Revised Manuscript received on 30 March 2019 | Manuscript published on 30 March 2019 | PP: 765-768 | Volume-7 Issue-6, March 2019 | Retrieval Number: F2857037619/19©BEIESP
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Abstract: Floorplanning is a life of any Very Large Scale Integration physical design flow. Floor planning is the method of assembling blocks in a chip and identifying structures which are closely organized and assigning space for them. One of the main responsibilities of floorplan in physical design is to reduce the area requirements and improving its performance. Floor plan in general is a Non-deterministic polynomial time hard problem and such problems can be resolved using numerous heuristics algorithm which can also be used for different representation. The key intention of this paper is to gain knowledge about different algorithms and to know how those algorithms can be used for solving a floorplan problem with constraints satisfying an optimal area and smaller run time thus increasing its performance.In existing method algorithms such as genetic algorithm, simulated annealing and ant colony optimization algorithm had been used and from those algorithms, genetic algorithm had given a better or promising result by its cost functions evaluation, when compared to other methods using ASIC Design implemented with MATLAB. But the Computation time of genetic algorithm was the major issue in existing system. Hence, the proposed method is dealt with improved particle swarm optimization algorithm based on inertia weight parameter because of its better computational efficiency and its high speed. A comparative study of four different algorithms based on its computation time has been made and shown that Particle Swarm Optimization algorithm takes less time for computation when compared with existing algorithms by their best cost function.
Keywords: Area optimization, Floorplanning, Heuristics algorithm, Physical design, VLSI

Scope of the Article: Low-power design