Design of Low Power and High Speed 4X4 Multiplier using Modified Column Bypassing Scheme for DSP Applications
E. Srinivas1, N. Sharath Babu2, G. Sreenivasa Raju3
1E. Srinivas, Associate Professor, Department of ECE, Anurag Group of Institutions, Hyderabad (Telangana), India.
2N. Sharath Babu, Assistant Professor, Department of ECE, Anurag Group of Institutions, Hyderabad (Telangana), India.
3G. Sreenivasa Raju, Associate Professor, Department of ECE, Anurag Group of Institutions, Hyderabad (Telangana), India.
Manuscript received on 19 July 2019 | Revised Manuscript received on 03 August 2019 | Manuscript Published on 10 August 2019 | PP: 643-647 | Volume-8 Issue-2S3 July 2019 | Retrieval Number: B11180782S319/2019©BEIESP | DOI: 10.35940/ijrte.B1118.0782S319
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: In this paper a low power and high speed 4X4 multiplier is designed using CMOS Technology. The important factors in VLSI Design are power, area, speed and design time. Now-a-days, power and speed has become a crucial factor in Digital Signal Processor (DSP) Applications. However, different optimization techniques are available in the digital electronic world. The proposed approach a Low power and high speed Multiplier Design based on Modified Column bypassing technique mainly used to reduce the switching power activity. While this technique offers great dynamic power savings, due to their interconnection. In this work, a low power and high speed multiplier with Hybridization scheme is presented. This scheme is combination of booth encoder algorithm and column bypass technique is called modified column bypassing scheme. The simulations are performed in 0.18µm CMOS Technology in Cadence Virtuoso tools with operating voltage ±1.8v.
Keywords: Multiplier, CMOS, Column Bypassing, Digital Signal Applications (DSP), Row Bypassing, Booth Encoder.
Scope of the Article: Low-power design