An Improved Area Efficient 16-QAM Transceiver Design using Vedic Multiplier for Wireless Applications
S. Dhanasekar1, P. Malin Bruntha2, C. Arunkumar Madhuvappan3, K.Martin Sagayam4

1S. Dhanasekar, Department of Electronics and Communication Engineering, Sri Eshwar College of Engineering, Coimbatore, India.
2P. Malin Bruntha, Department of Electronics and Communication Engineering, Karunya Institute of Technology and Sciences, Coimbatore, India.
3C. Arunkumar Madhuvappan, Department of Electronics and Communication Engineering, Vinakaya Misson’s Kirupanada Variyar Engineering College, Salem, India.
4K. Martin Sagayam, Department of Electronics and Communication Engineering, Karunya Institute of Technology and Sciences, Coimbatore, India. 

Manuscript received on 06 August 2019. | Revised Manuscript received on 14 August 2019. | Manuscript published on 30 September 2019. | PP: 4419-4425 | Volume-8 Issue-3 September 2019 | Retrieval Number: C5535098319/2019©BEIESP | DOI: 10.35940/ijrte.C5535.098319
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: In this research article, an improved area efficient 16-Quadrature Amplitude Modulation (QAM) transceiver design is introduced using Vedic multiplier. The 16-QAM design is transmitted using Pseudo Random Binary Sequence (PRBS) and modulated by changeable clock frequencies. The Vedic multiplier uses Urdhva Tiryakbhyam (Vertical and Crosswise) method of multiplication to reduce the undesirable steps and generates parallel partial products. Compressor adders are used in the Vedic multipliers, which helps to increase the speed of multiplication process and reduces the carry delay. Four Compressor adders namely 5-3, 10-4, 15-4 and 20-5 are used in a 16-bit Urdhva Tiryakbhyam Vedic multiplier to add its partial products. The proposed 16-QAM design is implemented using Spartan-3 XC3S200-5 pq208 Field Programmable Gate Array (FPGA) device which occupies 672 slices, 1102 4-input Look up Tables (LUTs) and 39 mW of power consumption. The Vedic multiplier based 16-QAM transceiver design reduces 17.2% slices and 4.5% 4-input LUTs. The 16-QAM is a preferred digital modulation method in the Orthogonal Frequency Division Multiplexing (OFDM) system, which reduces bit errors and noise effects during data transmission. The OFDM transceiver design is used in the high-speed wireless communication by excellence of its Multi-carrier modulation method.
Index Terms: BPSK, OFDM, OQSK, PRBS, QAM, QPSK

Scope of the Article:
Wireless Communication